VIZIO XRT136 Remote Control for 2019 Smart HDTVs V405-G9 V435-G0 V436-G1 V505-G9 (Renewed)
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Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 (1 Piece)
The CD4073B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
Medium-Speed Operation - tPLH, tPHL = 60 ns (typ.) at VDD = 10 V, 100% tested for quiescent current at 20 V.
Maximum input current of 1 µA at 18 V over full package-temperature range: 100 nA at 18 V and 25°C.
Noise margin (full package-temperature range) = 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V, Standardized, symmetrical output characteristics.
5-V, 10-V, and 15-V parametric ratings, Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices".
Each APC Replacement Battery Cartridges (RBC) is tested and certified for compatibility to restore the performance of your APC UPS to original specifications.
When you buy a new genuine APC RBC, you can recycle your old UPS battery via the "RBC Recycling Program" on the APC website. This program includes free return shipping to a recycling center (use the packaging from your new battery to return the old).
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Juried Engineering CD4025BE CD4025 CMOS Triple 3-Input NOR Gate IC Breadboard-Friendly DIP-14 (1 Piece)
Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V.
Buffered inputs and outputs, Maximum input current of 1 µA at 18 V over full package-temperature range.
Standardized symmetrical output characteristics, Noise margin (over full package temperature range): 1 V at VDD = 5 V, 2 V at VDD = 10, 2.5 V at VDD = 15 V.
100% tested for maximum quiescent current at 20 V, 5-V, 10-V, and 15-V parametric ratings.
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices".
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Juried Engineering CD4025BE CD4025 CMOS Triple 3-Input NOR Gate IC Breadboard-Friendly DIP-14 (Pack of 5)
Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V.
Buffered inputs and outputs, Maximum input current of 1 µA at 18 V over full package-temperature range.
Standardized symmetrical output characteristics, Noise margin (over full package temperature range): 1 V at VDD = 5 V, 2 V at VDD = 10, 2.5 V at VDD = 15 V.
100% tested for maximum quiescent current at 20 V, 5-V, 10-V, and 15-V parametric ratings.
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices".
Juried Engineering SN74HC21N 74HC21 Dual 4-Input Positive-and Gates Breadboard-Friendly IC DIP-14 (Pack of 5)
The CD4073B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
Medium-Speed Operation - tPLH, tPHL = 60 ns (typ.) at VDD = 10 V, 100% tested for quiescent current at 20 V.
Maximum input current of 1 µA at 18 V over full package-temperature range: 100 nA at 18 V and 25°C.
Noise margin (full package-temperature range) = 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V, Standardized, symmetrical output characteristics.
5-V, 10-V, and 15-V parametric ratings, Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices".
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Connector size: O.D, 6.5mm I.D, 4.4mm. Please pay attention to the dimension of the connector..
NTE Electronics NTE7447 Integrated Circuit TTL-BCD-to-Seven-Segment Decoder/Driver with Open Collector Outputs, 5.5V, 16-Lead DIP Package
The CD4073B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
Medium-Speed Operation - tPLH, tPHL = 60 ns (typ.) at VDD = 10 V, 100% tested for quiescent current at 20 V.
Maximum input current of 1 µA at 18 V over full package-temperature range: 100 nA at 18 V and 25°C.
Noise margin (full package-temperature range) = 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V, Standardized, symmetrical output characteristics.
5-V, 10-V, and 15-V parametric ratings, Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices".